1. Field of the Invention
The present invention relates to a method and device for driving a semiconductor device having a capacitive load such as a driving electrode of a two-dimensional matrix of charge-coupled device (CCD) solid-state image pickup elements, an electronic apparatus implementing the driving method and apparatus. More specifically, the present invention relates to an image pickup device achieving a high-speed frame rate in the reading of a signal. Furthermore, the present invention relates to a driving method and driving device for driving a load of capacitive reactance or a load of inductive reactance and an electronic apparatus implementing the driving method and device. More specifically, the present invention relates to a mechanism for reducing a variety of types of variations and environmental variations so that a load output signal mildly changes when pulse driving is performed at a predetermined transient speed.
2. Description of the Related Art
There is a mounting need for high-speed image capturing and then slow playback on a video camera incorporating a CCD solid-state image pickup element regardless of television system. Users are concerned with a drop in continuous shooting speed in digital still cameras incorporating the CCD solid-state image pickup element as the number of pixels increases. A need for high-speed image pickup element is thus mounting.
Electronic circuits and electronic apparatuses employ a variety of mechanisms for driving a load having an impedance component with a pulse signal.
For example, image pickup devices having a two-dimensional matrix of CCD solid-state image pickup elements, each containing a transfer electrode serving as a capacitive reactance, are widely used. Motors having winding coils serving as an inductive reactance are also used.
An impedance component such as a capacitive reactance or an inductive reactance as a load is typically driven by a pulse signal. Phase and transient characteristic of the driving pulse are affected by a relationship between the load and the driving element, more specifically, variations in the load, variations in performance of the element, and environmental variations. As a result, the load cannot be appropriately driven. At low speed driving, the effect of phase and transient characteristic variations may be marginal, but at high speed driving, a small amount of variation leads to large performance variation.
For example, when a plurality of loads are driven by pulse signals slightly shifted one after another in phase, appropriate driving cannot be performed. When two loads are driven by reverse phased driving signals, a slight phase different between the driving signals leads to inappropriate driving.
Specific examples are described below. There is a mounting need for high-speed image capturing and then slow playback on a video camera incorporating a CCD solid-state image pickup element regardless of television system. Users are concerned with a drop in continuous shooting speed in digital still cameras incorporating the CCD solid-state image pickup element as the number of pixels increases. A need for high-speed image pickup element is thus mounting.
FIGS. 22A and 22B illustrate a mechanism of a known image pickup device. FIG. 22A illustrates a major portion of the known image pickup device employing a CCD solid-state image pickup element implementing interline transfer (IT) system. FIG. 22B illustrates a driving method of the CCD solid-state image pickup element.
The known image pickup device 3 includes a CCD solid-state image pickup element 30, and a driving circuit 4 for driving the CCD solid-state image pickup element 30.
The CCD solid-state image pickup element 30 includes a two-dimensional matrix (rows by columns) of a plurality of light receiving sensors 31 serving as pixels, and an image pickup section (light receiving section) 30a having vertical transfer registers 33 having a plurality of CCD structures corresponding to the light receiving sensors 31. Horizontal transfer registers 34, each having a CCD structure, connected to the final stage of each vertical transfer register 33 are arranged outside the image pickup section (light receiving section) 30a, and an output section 36 is connected to the horizontal transfer registers 34.
Four types of horizontally extending vertical transfer electrodes 32 (ended with suffix numbers _1, _2, _3, and _4) are arranged in a vertical direction with a predetermined order in a manner such that an opening is provided on the light receiving surface of the light receiving sensors 31. The vertical transfer electrodes 32 are arranged on the vertical transfer registers 33 (light receiving surfaces) extending in the (vertical) direction of columns so that the vertical transfer registers 33 at the same vertical position at each column are grouped.
The four types of vertical transfer electrodes 32 are mounted so that two vertical transfer electrodes 32 correspond to a single light receiving sensor 31. The vertical transfer electrodes 32 are driven to transfer charge in the vertical direction by four types of vertical transfer pulses ΦV_1, ΦV_2, ΦV_3, and ΦV_4 supplied from the driving circuit 4. Every two light receiving sensors 31 (except the final stage thereof on the side of the horizontal transfer registers 34) are paired in one set. The four vertical transfer electrodes 32 are thus supplied with the vertical transfer pulses ΦV_1, ΦV_2, ΦV_3, and ΦV_4 respectively by the driving circuit 4.
As shown, on the side of the horizontal transfer registers 34, vertical transfer electrodes 32 are arranged for a set of four vertical transfer registers 33. The uppermost vertical transfer register 33 among the set corresponds to the vertical transfer electrode 32_1 supplied with the vertical transfer pulse ΦV_1. The one stage preceding vertical transfer electrode 32_2 (closer to the horizontal transfer registers 34) is provided with the vertical transfer pulse ΦV_2. The one stage preceding vertical transfer electrode 32_3 (closer to the horizontal transfer registers 34) is provided with the vertical transfer pulse ΦV_3. The vertical transfer electrode 32_4 closest to the horizontal transfer registers 34 is provided with the vertical transfer pulse ΦV_4.
The vertical transfer registers 33 are connected to the horizontal transfer register 34 via the one set of vertical transfer electrodes 32 at the last stage, namely 32_1 through 32_4 (supplied with ΦV_1 through Φ_4).
As for the horizontal transfer registers 34, two horizontal transfer electrodes 35 (ended with suffixes _1 and _2) are arranged for a single vertical transfer register 33. The horizontal transfer electrodes 35 are supplied with two phase horizontal driving pulses ΦH_1 and ΦH_2 from the driving circuit 4 to horizontally transfer signal charge.
In the CCD solid-state image pickup element 30 thus constructed, the light receiving sensors 31 photoelectrically converts received light, and stores signal charge responsive to an amount of received light. The signal charge of the light receiving sensor 31 is read into the vertical transfer register 33 during a vertical blanking period. Signal charge of one horizontal line is vertically transferred every horizontal blanking period. As a result, a so-called vertical line shift is performed to transfer the signal charge to the horizontal transfer registers 34. The signal charge transferred to the horizontal transfer registers 34 is horizontally transferred during an effective horizontal transfer period, and then output to the outside via the output section 36.
The vertical line shift of the signal charge in the known CCD solid-state image pickup element 30 is designed to be performed in response to the vertical transfer pulses (ΦV_1 through ΦV_4) during the horizontal blanking period Hb of television as represented by driving timing of a vertical line shift of FIG. 25B. More specifically, as shown in FIG. 25B, in the vertical line shifting of signal charge, the signal charge staying on the vertical transfer electrodes 32_2 and 32_3 corresponding to ΦV_2 and ΦV_3 is shifted to the horizontal transfer registers 34 in response to the four vertical transfer pulses ΦV_1, ΦV_2, ΦV_3, and ΦV_4 during the horizontal blanking period Hb. More specifically, at the falling edge of the vertical driving pulse ΦV_4 of the vertical transfer electrode 32_4, the signal charge is transferred to the horizontal transfer electrode 35_1 supplied with the horizontal driving pulse ΦH_1 of the horizontal transfer registers 34.
In the vertical line shifting, a gradient ΔV/ΔT of the rising edge and the falling edge of the vertical transfer pulses ΦV_1, ΦV_2, ΦV_3, and ΦV_4 respectively applied to the vertical transfer electrodes 32_1 through 32_4 (ΔV represent voltage and ΔT represents time) during the horizontal blanking period Hb, namely, a transient speed (ΔV/ΔT) equals the transient speed (ΔV/ΔT) of the vertical transfer pulses ΦV_1, ΦV_2, ΦV_3, and ΦV_4 respectively applied to the vertical transfer electrodes 32_1 through 32_4 during the vertical blanking period. FIG. 25B illustrates the driving pulse as a rectangular pulse having a vertically rising edge and a vertically falling edge.
High-speed vertical transfer is required during the vertical blanking period in the electronic image stabilization operation in the image pickup device such as a video camera using the CCD solid-state image pickup element, or in the CCD solid-state image pickup element of frame interline transfer (FIT) system applied for broadcasting business.
Japanese Unexamined Patent Application Publication No. 2000-138943 has proposed a technique in which a CCD solid-state image pickup element performs vertical line shifting with four types of vertical transfer pulses during the horizontal blanking period.
In the CCD solid-state image pickup element 30, the vertical line shift and the high-speed vertical transfer are driven by vertical drive scanning circuits of the same characteristic, namely, a vertical driver in the driving circuit 4. A complementary metal oxide semiconductor (CMOS) type vertical driver featuring high speed is typically used. If the vertical transfer is performed during the effective horizontal scanning period, noise due to crosstalk in the CCD solid-state image pickup element 30 (coupling noise) occurs at the moment the vertical transfer pulses (ΦV_1 through ΦV_4) are applied.
More specifically, cross-talk noise is induced on a CCD output signal, appearing as vertical streak noise because the transient speed at the rising edge and the falling edge of the driving waveform is high, namely, the gradient ΔV/ΔT of the rising edge and the falling edge of the vertical transfer pulses (ΦV_1 through ΦV_4) is large when the vertical transfer is performed during the horizontal scanning period. In other words, image quality is degraded (with noise) in response to high transient speed in the driving waveform. Further discussion about this will be provided in connection with embodiments of the present invention. One reason for the image degradation is that transient variations of a driving voltage on one electrode interferes with a driving voltage on another electrode.
To prevent image degradation, the vertical driving (vertical transfer) is performed outside the effective horizontal scanning period in the known art. More specifically, if the application of the vertical transfer pulses (ΦV_1 through ΦV_4) is performed during the horizontal blanking period, no problem is caused in image when the vertical line shift is performed. In the known CCD solid-state image pickup element, the vertical transfer for vertical line shifting is performed during the horizontal blanking period.
When TV method was typical, the horizontal blanking period was defined by the TV method, and it was sufficient if the vertical line shifting was performed during the horizontal blanking period. However, if the multi-pixel design and high-frame rate design are incorporated regardless of the TV method, the horizontal blanking period for the vertical line shifting becomes useless, and presents difficulty in the promotion of high frame-rate design.
To incorporate high frame rate design, the horizontal blanking period needs to be shortened. To this end, the vertical line shifting needs to be performed at high speed. To perform the vertical line shifting at high speed, a transfer electrode needs to have a low resistance. As one way to achieve low resistance, widening an electrode area is contemplated. It is difficult to widen the transfer electrode in horizontal direction. The thickness of the transfer electrode needs to be increased. If the thickness of the transfer electrode is increased too much, the height of a step around a sensor aperture becomes too large. When light enters, obliquely entering light is blocked, leading to drop in sensitivity and generation of shading. It is thus difficult to increase vertical transfer speed.
Even if an output rate of signal is increased to achieve a high frame rate in an electronic apparatus such as a digital still camera employing a CCD solid-state image pickup element not compatible with TV method, the horizontal blanking period becomes long. It is thus difficult to increase the output rate above a predetermined value.
Japanese Unexamined Patent Application Publication No. 2005-269060 assigned to the same assignee of this invention discloses a mechanism that achieves a high frame rate by substantially shortening a horizontal blanking period.
In the disclosed mechanism, a driving clock waveform having a transient speed ΔV/ΔT as a rising edge and a falling edge (ΔV represents voltage and ΔT represents time), i.e., a pulse signal being smooth and mild in gradient is supplied as a transfer pulse to a transfer electrode as a capacitive reactance. In high-density CCD, vertical transfer performed during an effective pixel period leads to a high frame rate with a slow clock rate. To this end, a smooth and mildly inclined gradient pulse signal is required.